Kristof Croes

Reliability challenges and opportunities of leading-edge interconnects

9 May 2019, 10:40-11:00

Main reliability challenges/opportunities of leading-edge interconnects will be discussed. 2D, 3D and optical interconnects will be handled. For 2D interconnects, we will mainly discuss electromigration and dielectric breakdown issues with deeply scaled copper interconnects and potential replacement metals and we will briefly address chip package interaction. For 3D interconnects, we will look into problems related to TSV reliability and stacking-related reliability concerns. For optical interconnects, we will list the main reliability challenges of the main components used in these technologies.

Kristof Croes has an MSc in physics and an MSc in biostatistics. Also, he obtained a PhD dealing with the development of statistical techniques for planning reliability experiments. After his PhD, he joined the reliability business unit of XPEQT, first as the software responsible and then as the manager of the R&D. From 2002 till end 2006, he was the product and application manager of the package-level reliability products of the Singapore-based company Chiron Holdings. Beginning 2007, he went back to research, working as a BEOL reliability engineer in Imec. Currently, he is the group leader of the Reliability, Electrical test and Modeling group working on test, characterization (electrical, thermal and (thermo-)mechanical) and reliability with the main focus on advanced interconnects (2D, 3D, OIO). He was an (invited/tutorial) speaker at several leading-edge semiconductor conferences (IRPS, IITC, IEDM, …). He also (co-)authored >100 papers in the field of reliability.